Apacer

TDK-Lambda, Inc.

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HoltIntegratedCircuits

Marketing Executive

Whatever happened to the explosive market for the revolutionary 3D-MEMS photonic cross-connects (PXCs) promised back at OFC-2000, with their supposedly thousand-by-thousand” port counts? A very different future for the PXC has emerged, one that is arguably even brighter than that articulated by the industry two years ago.

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IEI

Online Advertising Manager

The TIAs are being sold as bare die. Inphi is willing to help customers integrate the TIAs with photodiodes, as is common with 10 Gbit/s solutions, but it's not clear that a standard integrated part is warranted, the company said. We would consider it in the future, but at this point we believe there are performance advantages you can get by leaving them as discrete devices,” said Gary Franzosa, Inphi's director of marketing. It's very difficult to get a high enough inductance [between the devices] on-chip.”

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Sharp

Web Application Project Manager

The TIAs are being sold as bare die. Inphi is willing to help customers integrate the TIAs with photodiodes, as is common with 10 Gbit/s solutions, but it's not clear that a standard integrated part is warranted, the company said. We would consider it in the future, but at this point we believe there are performance advantages you can get by leaving them as discrete devices,” said Gary Franzosa, Inphi's director of marketing. It's very difficult to get a high enough inductance [between the devices] on-chip.”

Another foreign company already deeply entrenched in China is Yageo. The Taiwanese firm has invested $289 million over the past decade in its two large passives plants in Suzhou and Donguan.

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Jensen Global Inc.

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Cantherm

WSF452716R50FKEA_Datasheet PDF

Another foreign company already deeply entrenched in China is Yageo. The Taiwanese firm has invested $289 million over the past decade in its two large passives plants in Suzhou and Donguan.

Coming from an entirely different viewpoint, Y. David Lepejian, president, CEO and chairman of HPL Technologies (San Jose, Calif.) described the chain of events by which inadvertent choices in the design process create critical structures on the die, leading to depressed yield. In a world where products have a two- or three-year life, we can't wait 24 months for a manufacturing team to find the critical areas on the die and improve yields,” Lepejian said. We have to understand the critical factors for a given process at the beginning, and design in such a way as to minimize their density.” For Lepejian, whose company creates IP for test chips, this process starts with a test chip fabrication. Patterns on the chip are used to indicate what structures on actual designs will be the most failure-prone. Then the physical design of the chip is arranged to minimize the density of these critical features, and to warn manufacturing of die areas in which critical feature density remains high.

David Knowles VoltronicsAnDAPT, Inc.
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